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Phase Locked Loop (PLL)A circuit that compares the output of a voltage controlled oscillator with a reference signal and uses the resulting difference signal to adjust the oscillator so that it will be locked to the reference in both phase and frequency. Phase-lock loops are used in frequency synthesizers. This diagram shows how a phase locked loop circuit allows the precise creation of any frequency using a standard precision (crystal controlled) signal source. This example shows that a voltage-controlled oscillator (VCO) is used to provide a radio frequency (RF) signal based on an approximate DC voltage level. This RF signal is sampled and divided by a frequency divide. The frequency divider is programmed from the frequency control panel so it produces an output frequency that is the same as the crystal controlled (precision) frequency reference. This divided signal phase is compared against the reference frequency. As the phase begins to change, it produces a small DC voltage that is used to fine tune the VCO therefore phase locking it to the reference crystal frequency. Phase Locked Loop Diagram Related WiMAX DefinitionsIntra Frames - I-Frames WiMAX Books
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